soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的，含蓄的
牛津词典
adj.
- 软性色情的；（性描写等）隐晦的，含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的，较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- Design of an Ethernet Interface Based on the Nios Soft-core Processor
基于Nios软核处理器的以太网接口设计 - Nios II soft-core processor implanted into FPGA as the control chip controls and preprocesses the data of the entire image acquisition system.
采用FPGA作为控制芯片，在其中植入NiosⅡ软核处理器以对整个图像采集系统的数据进行控制和预处理。 - For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
对于数字部分，在FPGA内构建SOPC系统，嵌入NIOSii软核处理器对整个系统进行控制。 - To solute the problem, the idea of kernel hardware design has been put forward. System architecture is divided into soft-core and hardcore. Hardcore will manage application tasks as a coprocessor to improve the real time of system.
针对实时性问题，提出将内核硬件化设计的思想，将系统的体系结构划分为软核和硬核，硬核作为协处理器管理应用任务，提高系统的实时性，使系统的性能得到明显的提高。 - I distinctly remember my high school self, wide-eyed, poring over the soft-core Starr report with friends.
我还清楚地记得高中时代的我，睁大了眼睛，和朋友们一起狼吞虎咽地读着《斯塔尔报告》（StarrReport）中那些香艳的内容。 - The paper introduces the structural features of the network processor Nios II and customized instructions and design methods for forwarding software of the network processor based on the Nios II soft-core processor and design methods for the DSP processor used for the processing of the video and image data.
文中介绍了网络处理器NIOSii的结构特点和自定义指令以及基于NIOSii软核处理器的网络处理器转发软件的设计方法和基于视频图像处理的DSP处理器的设计方法。 - In practice, the designer can use this soft-core as a communication module through the FPGA implementation or to quickly build a Field Bus communication system to realize flexible CAN bus interface solutions.
在实际应用中设计者可以将此软核作为通讯模块通过FPGA实现，或者快速搭建现场总线通信系统，实现灵活的CAN总线接口方案。 - Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核，包括运动矢量生成模块、预测处理模块和插值模块。 - First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
第一，运用了在单芯片上实现系统功能的设计思想，采用了高性能的软核处理器（NiosIICPU）和IP复用技术，提高了整个系统的运行速度和进一步改进的灵活性。 - The Nios ⅱ soft-core processor improve the integration of the system and is helpful to the miniaturization of instrument.
NiosⅡ软核处理器提高了系统的集成度，有利于系统的小型化，降低了成本。